三星电机正在恢复对玻璃基板供应链的采购订单，三星美国领导岗位（如刚哥）从技术转销售；台积电玻璃芯基封装从Cowos转向Copos，芯片上玻璃基板成测试关键；skc工程师和销售岗位加大；博通，Marvell玻璃芯片验证加速。只有AMD得不到任何传闻消息。

当前，玻璃基板技术路线正在发生深刻变化。其中玻璃芯基板取代有机基板路线，这类载板用于大算力GPU/Chiplet异构封装，是2026年头部企业玻璃芯基板的研发标准。iTGV预测第一代搭载玻璃芯基板的AI芯片将于2028年上市，最主要的头部企业包括英伟达、三星、英特尔、博通、Marvell、华为。

1）玻璃芯+ ABF面向AI算力芯片的UHD超高密度基板，在玻璃芯基板上的PP+ABF堆叠层数从22层提升到30层，取代ABF的低 CTE的材料出现，用于玻璃芯上下10层堆叠。基于此路线，2026年玻璃芯基板的尺寸从120mm x 120mm(英特尔)增加到 140mm x 160mm（台积电），150mm x 150mm（三星）。远超英伟达 CoWoS-L封装的Rubin 100mm x 100mm有机基板尺寸。

2）TGV通孔直径范围30-50μm，深宽比 10:1~20:1~30:1，通孔采用铜完全填充方案。在积层内埋元件，铜柱增粗、键合增密，封装成品芯片加厚。支持芯片嵌入式封装设计，进一步缩短互连路径。线宽/间距小于 2μm/2μm以下。依靠mSAP半加成工艺实现高密度布线。逼近200nm 超细BGA扇出+POFV填孔工艺+高速低损耗材料。

3）该方案中介层可为RDL嵌入硅桥、可为TSV、可为玻璃中介层、可为RDL+硅中介。可采用玻璃晶圆级封装和面板级封装。面板级封装从310mm x 310mm起步。

The iTGV2027 International Glass Through-Hole Technology Innovation and Application Forum will be held in Wuxi（Wuxi International Conference Center）, China from May 12-14, 2027. The forum will feature one main forum, nine sub-forums:

InternationalGlass Through-Hole Technology Innovation and Application Forum （iTGV2027）：iTGV2027 focuses on high-speed interconnection verification of advanced chips, panel-level glass interposers/glass bridges, packaging substrates and CPB. Adopting FLP/CoPoS panel-level packaging technologies, it will conduct large-scale, systematic and ecosystem-wide verification to tackle substrate warpage issues ahead of glass substrate mass production.

2. GCP Glass Circuit Board Technology Summit： centers on the innovative stacked glass PCB architecture and its reliable, stable mass-production process chain. It fundamentally addresses the longstanding large-area warpage issue of organic substrates and ushers in a new era of panel-level packaging based on next-generation glass substrates for large AI chips.

3. Glass-IP (Glass Interposer )Technology Summit：Glass-IP is a panel-level glass interposer, featuring a UTG-glass-based 2.5D packaging structure for high-density interconnection among advanced chips. Designed to replace traditional silicon interposers, it addresses warpage, heat dissipation and signal transmission issues in large-form-factor chip packaging. The Glass-IP Technology Summit will discuss engineering samples of glass interposers sized 310mm×310mm, 510mm×515mm and 600mm×3600mm.

4. CoPoS Technology Summit:CoPoS is regarded as the next-generation successor to TSMC’s flagship packaging technology CoWoS (Chip-on-Wafer-on-Substrate). Its core innovation lies in "transforming circles into squares" — replacing round silicon wafers adopted in conventional packaging with larger-area rectangular panels.The CoPoS Technology Summit will collaborate with the industry to drive mass production in phases based on different materials. In Phase 1, RDL/organic interposers targeted for 2028–2029 will enable the transition from round wafers to rectangular panels. Enabled by technological breakthroughs of glass substrates in next-gen panel-level packaging, glass interposers will be introduced into mass production for CoPoS interposer applications around 2030. Meanwhile, the substrate layer of CoPoS will also shift to glass-core substrates. Confronting key industrialization challenges head-on, the CoPoS Technology Summit joins forces with enterprises covering core process segments across the packaging supply chain to tackle technical bottlenecks jointly.

5. FOPLP Fan-Out Panel-Level Packaging Cooperation Forum:FOPLP Fan-Out Panel-Level Packaging Cooperation Forum is a cutting-edge conference focused on advanced packaging technologies, dedicated to advancing the industrialization of Fan-Out Panel Level Packaging (FOPLP). The forum brings together upstream and downstream enterprises from the global semiconductor industrial chain, research institutions and industry experts to conduct in-depth discussions on key topics including technological innovation, process optimization, material development, equipment upgrading and market applications of panel-level packaging.The forum places particular emphasis on the application of glass substrates in panel-level packaging. It explores how large-size rectangular panels can replace traditional round silicon wafers to boost packaging efficiency, cut costs and enable high-density integration. Discussion topics cover Through-Glass Via (TGV) technology, high-density interconnection, thermal management, process reliability, domestic equipment development, as well as packaging requirements for emerging sectors such as AI, HPC and automotive electronics.

6. iCPO International Optoelectronic Co-packaging Exchange Conference：This high-level international event specializes in optoelectronic integration and optoelectronic packaging. It centers on the frontier evolution and industrialization of CPO/NPO co-packaged optics. Discussions revolve around glass substrate applications in optoelectronic co-packaging, including scenarios such as data centers, telecommunications, autonomous driving and optical computing, alongside innovations in materials, processes and equipment.

7. Class-Bridge Technology Forum：Glass Bridge technology is a glass-based optical interconnection solution, mainly designed to address coupling challenges between photonic integrated circuits (PICs) and optical fibers. It holds vital application value particularly in the fields of co-packaged optics (CPO) and glass-based semiconductor packaging. The Glass Bridge Technology Forum will focus on cutting-edge applications of glass bridges in optical interconnection.

8. CoWoP Technology Forum：CoWoP serves as a vital evolutionary architecture bridging CoWoS and CoPoS. It inherits the mature wafer-level packaging processes of CoWoS while adopting large-area panel carriers, acting as a critical transitional technical route from circular wafer packaging to rectangular panel-level packaging. The summit brings together industry stakeholders to discuss process migration, material matching, yield optimization and mass production validation of Chip-on-Wafer-on-Panel technology, and explores viable approaches for progressive panelization in advanced packaging.

9. CoPoP Technology Forum：The CoPoP Technology Forum is a professional exchange platform focusing on Chip-on-Panel-on-PCB (CoPoP) technology in advanced packaging. It aims to advance the application and development of this technology for AI compute chip packaging.Discussions revolve around technical requirements, process challenges and material innovations of the glass-substrate-based CoPoP architecture. The forum explores how the combination of glass-based panel-level processing and PCB integration can deliver more streamlined and efficient packaging solutions to reduce signal path loss, improve thermal performance, and satisfy packaging requirements for large-size AI chips.

10. Glass-CoWoS Technology Forum。Glass-based wafer-level packaging is a concept contrasted with silicon-substrate wafer-level packaging. Based on wafer-level packaging architecture, it replaces silicon interposers with glass interposers. Compared with silicon interposers, it delivers higher bandwidth, finer line features, lower costs and an almost perfectly flat surface.

•Silicon Interposer→Glass Interposer

•Silicon Interposer + Organic Substrate→Glass Pkg

•Silicon Interposer + Organic Substrate→Silicon Interposer + Organic

iTGV2027无锡玻璃基板大会将于5月12-14日隆重召开。iTGV国际玻璃通孔技术创新与应用论坛系列之所以能引领下一代AI封装技术，核心在于它精准卡位“玻璃基板+TGV”这一AI大芯片封装的材料与工艺革命拐点，并持续扮演全球最高规格的技术路线重构与产业化加速平台。

1. 定位独特：全球唯一聚焦玻璃基板面向AI大芯片的顶级专业会议

iTGV（International Through Glass Via Technology Innovation and Application Forum）由中国科学院微电子研究所与未来半导体等联合主办，IEEE-EPS相关分会承办。它被定位为全球率先、规模最大、规格最高、产业链最全、演讲质量与数量领先的TGV/玻璃基板专业会议，专门服务下一代AI/HPC大芯片封装需求。

# iTGV2027 将以“飞跃天渊，桥接未来”为关键主题，聚焦超大尺寸的玻璃中接触、玻璃桥与玻璃异构继承方案，设置主论坛：

1、国际玻璃通孔技术创新与应用论坛（探讨TGV技术的前沿进展）

2、GCP玻璃线路板技术峰会（超高密度玻璃堆叠方案）

3、Glass-IP 技术峰会（聚焦玻璃中介层）

# iTGV2027 分论坛聚焦玻璃基板在晶圆级与面板级封装的技术拓展应用，分为：

4、CoPoS技术峰会（继续炒作台积电，让他祭出屠龙宝刀）

5、FOPLP扇出面板级封装合作论坛

7、Class-Bridge 互联玻璃桥技术论坛

2026年第三届（iTGV2026，无锡）以“重构玻璃基板技术路线”为主题，覆盖CoPoS技术峰会、GCP玻璃线路板技术峰会、FOPLP扇出面板级封装、iCPO光电合封等全链路，吸引数千名专业观众与近200家展商，明确提出国产GCP玻璃线路板方案并推动首批国产算力芯片目标2028年初上市，同时发起中国玻璃线路板产业联盟（GCPA），统一规范、打通材料-设备-工艺适配瓶颈。这些成果直接为2027年会议奠定基础。

行业共识显示，2026-2027年是玻璃基板从技术验证向试产/客户认证过渡的关键节点，2028-2029年逐步放量。多家厂商已将试产时间点提前至2027年下半年（原预期多在2028年）：

钛昇等设备商反馈客户信息显示整体时程提前，TGV激光改质速度大幅提升后量产可行性增强。

京东方板级玻璃基封装载板试验线已于2026年上半年全自动化通线。

Toppan、DNP、JNTC、Samsung相关方、Intel（No SeWaRe突破）、TSMC CoPoS路线等均指向2027年前后试产或关键节点验证。

iTGV2027正好落在这一窗口，能够集中解决量产痛点（翘曲控制、高深宽比TGV成孔与填铜、微裂纹/SeWaRe控制、大面板对位精度、检测良率、面板级成本与产能），并推动供应链协同。

3. 技术本质：玻璃基板+TGV是AI封装的“材料革命”

传统有机基板（ABF等）在超大尺寸AI芯片（多reticle、多HBM、高功耗）下面临严重翘曲、热膨胀系数不匹配、信号损耗与I/O密度瓶颈。玻璃基板优势显著：

CTE更接近硅，抗翘曲能力强，支持更大面板（310×310 mm至510×515 mm甚至更大）。

低介电损耗、高平整度，适合高速信号与更高密度互连。

支持面板级制造，材料利用率与成本潜力优于晶圆级。

TGV作为垂直互连核心，工艺虽复杂（激光改质/成孔、蚀刻、金属化、检测），但一旦突破即可支撑CoPoS（Chip-on-Panel-on-Substrate）、玻璃芯基板、CPO光电合封等路线。

TSMC推进CoPoS（短期聚焦较小尺寸试产，后续向大玻璃芯演进）、Intel玻璃基板+EMIB、Samsung/Absolics等布局，均指向玻璃基成为下一代AI加速器封装的重要选项。iTGV系列通过主论坛+多应用分论坛，系统性重构技术路线，并链接设计公司、OSAT、材料、设备全链条。

会议不仅技术交流，更通过联盟、标准、报告发布（如玻璃基板技术与市场报告）、供需对接，加速国产替代与全球供应链重构。它直面同期国际会议（如ECTC），确立中国在这一新赛道的话语权与落地能力，为AI时代提供“超低损耗、高算力密度”的底层硬件底座。

总结：iTGV2027并非普通行业会议，而是在2027这一试产加速关键年，以“重构路线+生态协同+量产攻坚”为核心，直接服务AI大芯片对超大尺寸、高密度、低翘曲封装的迫切需求。它通过持续聚集全球顶尖资源，推动玻璃基板从实验室验证走向商业化落地，因此具备引领下一代AI封装技术的独特地位。后续具体议程与参会信息预计会在未来半导体相关渠道进一步更新。

Drol Hewhay的最新長文及歷史文章，讓您掌握相關股市行情消息，協助您做投資決策。

玻璃基板

iTGV2027

iTGV2027无锡玻璃基板大会将于5月12-14日隆重召开

iTGV2027玻璃基板大会为何引领下一代AI封装技术